Current
California State Polytechnic University, Pomona
B.S. Computer Engineering (Junior Transfer) • Aug 2025 — Jan 2027 (Expected)
GPA
3.6
Open to Internships
Hi, I'm Andrew Riad.
Computer Engineering • Hardware Design • Digital Logic
I'm a junior Computer Engineering student at Cal Poly Pomona focused on computer hardware and digital system design. I'm interested in how hardware components interact at the logic and system level, from design and simulation to testing and verification.
About
A quick snapshot of who I am and what I'm aiming for.
I'm a Computer Engineering student with a strong interest in computer hardware and digital system design. I enjoy working at the logic and architecture level—designing, analyzing, and testing hardware systems to understand how individual components interact and perform as a whole.
My approach to engineering emphasizes reasoning from specifications, accounting for constraints, and validating designs through simulation and hands-on testing. I'm particularly drawn to digital logic and hardware behavior.
I'm currently seeking a hardware engineering internship where I can contribute to design and verification work while continuing to build practical experience in computer hardware systems.
Digital Logic
Circuit Analysis
Embedded Fundamentals
Troubleshooting
C / C++ / C#
CAD / 3D Modeling
Education
Coursework foundations and current track.
Chaffey College — Rancho Cucamonga
Associate's in Physical Science • Jan 2022 — Aug 2025
Associates degree for Transfer in Physical Science
Associates degree for Transfer in Mathematics
GPA
3.6
Relevant Coursework
Selected engineering and math courses completed.
Calculus III, Linear Algebra/Differential Equations
Physics for Scientists & Engineers II (Electromagnetism & Circuits) + Labs
Digital Logic Design + Lab
Electrical Circuit Analysis II + Labs
Object Oriented Programming & Data Structures and Algorithms
Intro to Microelectronics (Including RF Concepts)
Skills
Tools and strengths I bring to a team.
Engineering
- Circuit analysis & simulation
- Breadboard & lab testing
- Embedded systems basics
- Hardware troubleshooting
- Digital systems fundamentals
Software & Tools
- C / C++ / C# Microsoft Visual Studio
- 3D Modeling SolidWorks, AutoCAD, Fusion
- Circuit Simulation Multisim
- Office Suite Microsoft 365, QuickBooks
How I Work
I like structured problem solving: define requirements, build a minimal prototype, test quickly, then iterate. I communicate clearly, document what I change, and keep projects organized.
Experience
Roles that built my operations, communication, and technical troubleshooting skills.
Office Manager
Current RoleLock and Roll Locksmith • Feb 2025 — Present
- Operations: Managed daily office operations, scheduling, and logistics for multiple technicians.
- Systems: Improved accuracy and efficiency by implementing digital tracking systems and better data organization.
- Inventory: Oversaw inventory management and supply ordering with spreadsheets and digital recordkeeping.
- Technical: Assisted with hardware/software troubleshooting for office computers, POS, and scheduling platforms.
- Data: Maintained customer database integrity and service documentation for reliable field communication.
Sales Associate
Office Depot • Oct 2023 — Feb 2025
- Provided customer service and sales support in a fast-paced retail environment.
- Advised customers on computers, printers, and tech products by comparing options and recommending solutions.
- Handled POS transactions, returns, online order fulfillment, and inventory restocking.
Projects
Selected labs and builds showcasing digital logic design skills.
4×16 Decoder + Minterm Display (74LS138)
Designed a 4×16 decoder using two 3-to-8 decoders and minimal logic. Generated minterms 1/5/9 and drove a seven-segment display; blanked the display and lit an “OTHER” LED for all other inputs.
DecodersCombinational7‑SegmentTTL
5-bit Signed Adder/Subtractor (74LS283 / 74LS86)
Implemented a signed 5-bit adder/subtractor using cascaded full adders with XOR-controlled inversion for two’s-complement subtraction. Added sign + overflow LEDs and displayed results via BCD on a seven-seg.
ArithmeticTwo’s ComplementOverflowBCD
EPROM Lookup: Square of a BCD Digit
Built an EPROM-based lookup table that outputs the square of a BCD input and drives two seven-segment displays. Verified correct outputs across 0–9 inputs (with the lab’s group-specific mapping).
MemoryEPROMLookup Table7‑Segment
Nonbinary Sequence Counter (0,1,2,4,5,6,7)
Designed and built a nonbinary counter using T flip-flops (implemented with JK FFs). Derived logic with state table/K-maps and verified the sequence on a seven-seg display, including self-correction behavior.
CountersSequential LogicK‑MapsVerification
4-bit General-Purpose Register
Created a 4-bit register supporting parallel load, rotate-left, rotate-right, and increment operations using multiplexers and flip-flops. Demonstrated each mode on LEDs with switch-controlled selects.
RegistersMUXControl LogicAdders
Contact
Want to chat about an internship, a project, or a role? Reach out.
Reach me
- Email andyriad98@gmail.com
- Phone 909-646-0187
- LinkedIn linkedin.com/in/andrew-riad-8295b8388
- Handshake cpp.joinhandshake.com/profiles/riad
- Location Rancho Cucamonga, CA